Beating AI News Flash: Last year, DeepSeek attempted to train R2 using Huawei Ascend chips but ultimately failed. The Financial Times disclosed at the time that there were issues with chip stability, inter-card communication, and software support. Even with Huawei engineers on-site to assist, DeepSeek eventually switched back to Nvidia chips to complete the training.
More than a year later, the two sides have deepened their collaboration into hardware design. The Information now reports that Huawei engineers are stationed long-term at DeepSeek's offices, incorporating actual requirements from model training directly into the design of next-generation Ascend chips, including how to arrange computing tasks and how to transfer data between chips.
At the end of September this year, DeepSeek open-sourced the Ascend version of TileLang, along with low-level tools for matrix computation and MoE expert communication, reducing the development work needed to migrate models to domestic chips. But getting software to run is still a long way from full pre-training. Tens of thousands of chips need to work in coordination continuously for weeks; any single chip failure or data transmission delay could slow down the entire cluster. Now the two sides are beginning to address these issues at the chip design stage.
Huawei plans to prioritize most of the supply of the Ascend 960DT, ready in the first quarter of 2027, to DeepSeek rather than distributing it to other model companies. DeepSeek, in turn, plans to begin pre-training with the 950DT as early as the end of this year. Related testing has already used more than 1,000 chips, while full pre-training may require tens of thousands, and some cluster management software is still incomplete. Meanwhile, DeepSeek is still seeking more Nvidia chips.

